Arm Unveils 2024 CPU Core Designs, Cortex X925, A725 and A520: Arm v9.2 Redefined For 3nm
by Gavin Bonshor on May 29, 2024 11:00 AM EST- Posted in
- CPUs
- Arm
- Smartphones
- Mobile
- SoCs
- Cortex
- 3nm
- Armv9.2
- Cortex-A520
- Cortex X925
- Cortex A725
Arm Cortex A725: Improvements to Middle Core Efficiency
The Arm Cortex-A725 is designed to balance performance and power efficiency, making it a critical component of the second-generation Armv9.2 architecture. Positioned as a mid-tier core, it complements the high-performance Cortex-X925 by offering robust capabilities for everyday computing tasks while maintaining energy efficiency. This core is especially targeted at devices that require consistent performance without the high power consumption associated with top-tier cores, such as smartphones, tablets, and laptops.
The Cortex-A725 builds on the successes of its predecessor, the Cortex-A720, with several key architectural enhancements. One of the significant improvements is the increased instruction issue queue and the expanded reorder buffer, which enable the core to handle more instructions simultaneously and execute them out of order for improved efficiency. This increase in the out-of-order execution window size allows the Cortex-A725 to utilize its execution units better, leading to smoother and faster processing of complex workloads.
The core also benefits from a new 1MB L2 cache configuration, which provides faster access to frequently used data and instructions. This larger cache size is designed to reduce latency and improve performance, particularly for applications that require rapid data retrieval. Additionally, the Cortex-A725 features enhancements in its register file structure, further streamlining data processing and reducing bottlenecks.
Power efficiency is a crucial aspect of the Cortex-A725's design. With leading-edge 2024 Cortex chips expected to be fabbed on newly-available 3nm process technologies from TSMC and others, the improved performance from these nodes is able to drive big improvements in energy efficiency, and Arm is leaning into that heavily with the A725. Overall, Arm is touting that A725 delivers significant power savings compared to previous generations. Compared to the Cortex-A720, the Cortex-A725 offers up to a 25% improvement in power efficiency (and 20% L3 traffic reduction), making it an ideal choice for mobile devices that require long battery life.
The core also features advanced power management capabilities, including dynamic voltage and frequency scaling (DVFS) and half-slice power-down modes. These features allow the Cortex-A725 to adjust its power consumption based on the current workload, ensuring energy is used efficiently without sacrificing performance.
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mode_13h - Thursday, May 30, 2024 - link
> Also, amazing increases in performance per watt doesn't mean less power draw.ARM provided power/performance curves, the point of which is to show how much more efficient the new cores can be at ISO performance, or how much more performance you can get at the same power, or what tradeoffs you can make anywhere in between.
I know their unitless graphs and lack of details about the workload used to produce them can stretch their credibility, but it's not as if they aren't aware that these cores often won't be clocked to the max. Reply
vegemeister - Friday, May 31, 2024 - link
In most client application, you always do 1x the work, and the only difference is how long it takes / what the CPU utilization % is.So the SoC will indeed use 1/1.33 as much energy. Reply
eastcoast_pete - Sunday, June 2, 2024 - link
It does overall if the OS and the SoC does "hurry up and get to idle" really well. This is something Apple's mobile SoCs have excelled at in recent times, it helps that their "Little" (efficiency) cores are strong performers that use out-of-order execution and other features to allow the SoC to stay on the efficiency cores for far longer. Android smartphones based on stock ARM cores don't have that option as much, and seem to end up running their larger cores more often and longer. Would also be interesting how much of that efficiency penalty can also be attributed to Android OS, but ARM has been very stubborn sticking to in-order execution for its Little cores. Which is puzzling, but good for Apple. Replymode_13h - Thursday, May 30, 2024 - link
I'm disappointed that ARM seems to have deviated from their practice of releasing ISO-power and ISO-performance figures.Also, I noticed they swapped the axis' in their power/performance graph so that it curves upwards rather than leveling off. I guess some marketing goon decided graphs look more impressive if they curve upward. And, as usual, we get the unitless graphs that don't start at zero.
Hey, does anyone know if the A520 still potentially shares vector FP units between a pair of cores, or did that gem of an idea begin and end with the A510? Reply
GeoffreyA - Thursday, May 30, 2024 - link
"shares vector FP units between a pair of cores"That was a Bulldozer principle, if I remember rightly. Reply
kkilobyte - Thursday, May 30, 2024 - link
Ok, sorry to remind you and maybe sound a little 'pushy' about it, but what about the i9-14900KS test redo with Intel Default settings? You told us 20 days ago that you'd redo them :Gavin Bonshor - Friday, May 10, 2024 - link
Don't worry; I will be testing Intel Default settings, too. I'm testing over the weekend and adding them in.
So, will this promise be ever fullfilled? Reply
mode_13h - Thursday, May 30, 2024 - link
+1Please deliver the promised update to the i9-14900KS review! The people deserve to know how much performance is being lost with Intel's new recommended defaults! Reply
watersb - Friday, May 31, 2024 - link
Pronunciation of their new software branding, 'Kleidi', is not completely clear to me.One way is to make it sound like the name of a girl, rhymes with 'Heidi'. So a single syllable.
The other way is to infer that the Arm Marketing people wished to evoke a colorful collection of myriad bits that can combine to form interesting patterns. A toy, A Kaleidoscope.
Unfortunately, that sounds like "Collide-y" to me: a product that tends to bang into other pieces.
Which would be an unfortunate name for automotive applications. Reply
EthiaW - Sunday, June 2, 2024 - link
ARM routinely claims the fruit of TSMC node improvement as its own achievement, you'll get familiar with the cliche after following it for a few years.🙄 As for competition, we are already seeing Apple 9-core M4, the 1.5 times bigger brother of A18. Halve the memory score and lower its frequency to a more phone-friendly 3.7Ghz, it's still scoring at least 3200 in geekbench single core which X925 is certainly not going to catch up with. By the time new ARM laptop hits the market Zen5 mobile and Lunar Lake will be prevalent and based on available data an single core improvement of at least 20% is expected so X925 will not have an easy time. I'd say this generation of ARM cores are mostly incremental and nothing revolutional. Replymode_13h - Sunday, June 2, 2024 - link
> ARM routinely claims the fruit of TSMC node improvement as its own achievement,There's nothing automatic about an IPC improvement. You have to actually make design changes to take advantage of the larger transistor budget and timing margins, in order to achieve that. Otherwise, the only way CPUs would get faster from shrinking nodes is just by increasing clockspeeds, which incurs a high cost in additional power.
Plus, how is this any different than what Intel and AMD do, when they announce new CPU microarchitectures? They don't usually separate out how much improvement is from the node, if ever.
> Zen5 mobile and Lunar Lake will be prevalent and based on available data
> an single core improvement of at least 20% is expected
At what power level? It's not 20% IPC, so there's some additional clockspeed in that figure, which might not be entirely applicable to laptops. Reply