Dual CPU Database Server Comparison
by Johan De Gelas on December 2, 2004 12:11 AM EST- Posted in
- IT Computing
The newest addition: Intel's Lindenhurst server
Our Dual Intel Xeon 3.6 GHz server was based on the Lindenhurst chipset, a server chipset similar to the i925 desktop chipsets.The Intel Server Board SE7520AF2 is one of the first boards to make extensive use of the real world advantages that PCI Express and DDR-II offer in the server world. This is in contrast with the desktop market, where DDR-II is mostly a much more expensive and only marginally faster alternative to DDR SDRAM.
One of the problems of SDRAM is that the complete address and command bus must be connected to each chip. (The databus does not have this problem - the 8 chips are connected to 8 parallel wires.) To make it worse, addresses and commands must be presented to all DRAM chips on a DDR DIMM at the same time.
You can read more about it here. To make a long story short: one of the most important reasons for limiting the number of SDRAM chips per memory channel is the load and thus, signal integrity on the address bus. DDR-II has the same problem, but many of the new features (OCD-calibration, On Die termination, BGA packaging, lower differential voltage swing) of DDR-II improve signal integrity significantly compared to DDR-I.
Secondly, DDR-II consumes almost 30% less than comparable DDR-I DIMMs, which is a big advantage if you consider that each GB of DDR-I consumes about 10 watts. Especially in a 64 bit server, where you want to use more than 4 GB of RAM, this will be a nice improvement.
The result is that the Lindenhurst board can offer 4 DIMMs per channel while the other Xeon servers with DDR-I were limited to 4 DIMMs in total, or one per memory channel. This might seem trivial, but it neutralizes an advantage that the Opteron previously had over the slightly older Xeon: it is cheaper to use 8x 1 GB than to use 4 x 2 GB. More DIMM slots result in more flexibility; a lower price per GB or a higher maximum RAM capacity.
Thirdly, the E7520 chipset makes a full duplex 2.1 GB/s x8 PCIe slot and an x4 PCIe slot available, in addtion to the typical 100 and 133 MHz PCI-X slots that we find in many servers.
The 7520 chipset is also the first server chipset with a FSB of 800 MHz, which connects to two channels of Registered ECC DDR2 400 memory. While the latter does not have the bandwidth of their 533 MHz / 667 MHz brothers, the actual latency (3-3-3, 5 ns) is pretty low, which is, for most server applications, more important than raw bandwidth.
The new serverboard also includes an updated version of Intel's Server Management 8 solution and has a dual-channel Ultra320 SCSI controller on board. Notice the white rectangle at the bottom of the server, which contains the RAID cache and battery backup of this RAM cache.
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smn198 - Thursday, December 2, 2004 - link
Would love to see how MS SQL performs in similar tests.mrVW - Thursday, December 2, 2004 - link
This test seems foolish to me. A 1GB database? All of that fits in ram.A database server is all about being the most reliable form of STORAGE, not some worthless repeat queries that you should cache anyway.
Transactions, logging... I mean how realistic is it to have a 1GB of database on a system with 4GB of RAM and expensive DB2 software.
A real e-commerce site likeMWave, NewEgg, Crucial could have 20GB per year! Names, addresses, order detail, customer support history, etc.
Once you get over a certain size, a database is all about disk (putting logging on one disk indepdent of the daata, etc.). The indexes do the main searching work.
This whole test seems geared to be CPU focused, but only a hardware hacker would apply software in such a crazy way.
mrdudesir - Thursday, December 2, 2004 - link
man i would love to have one of those systems. Great job on the review you guys, its good to know that there are places where you can still get great independent analysis.Zac42 - Thursday, December 2, 2004 - link
mmmmmmm Quad Opterons......Snoop - Thursday, December 2, 2004 - link
Great readksherman - Thursday, December 2, 2004 - link
is that pic from the 'lab'? (the one on pg 1)